View 5500I_968712.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Final Electrical Specifications
LT5500 1.8GHz to 2.7GHz Receiver Front End
December 2001
FEATURES
s s s s s s s s
DESCRIPTION
The LT(R)5500 is a receiver front end IC designed for low voltage operation and is compatible with the LTC family of WLAN products. The chip contains a low noise amplifier (LNA), a Mixer and an LO buffer. The IC is designed to operate over a power supply voltage range from 1.8V to 5.25V. The LNA can be set to either high gain or low gain mode. At 2.5GHz, the high gain mode provides 13.5dB gain and a noise figure (NF) of 4dB. The LNA in low gain mode provides -14dB gain and an IIP3 of + 8dBm at 2.5GHz. The mixer has 5dB of conversion gain and an IIP3 of - 2.5dBm at 2.5GHz, with -10dBm LO input power.
, LTC and LT are registered trademarks of Linear Technology Corporation.
1.8V to 5.25V Supply Dual LNA Gain Setting: +13.5dB/-14dB at 2.5GHz Double-Balanced Mixer Internal LO Buffer LNA Input Internally Matched Low Supply Current: 23mA Low Shutdown Current: 2A 24-Lead Narrow SSOP Package
APPLICATIONS
s s s
IEEE 802.11 and 802.11b DSSS and FHSS High Speed Wireless LAN Wireless Local Loop
TYPICAL APPLICATION
ENABLE 100pF 100pF GAIN SELECT 2V 100pF x2 L4 RF INPUT LNA_IN GND LNA_GND LO - LNA_OUT C4
LNA GAIN (dB)
BAND SELECT FILTER
EN
LT5500
GS L2
2V VCC 1F 1nF 100pF x4 MIX_GND L5 T2 8:1 IF + LO RF IF IF -
LO +
C17
L3 LO INPUT
INTERSTAGE FILTER
MIX_IN
L9 C23
IF OUTPUT L7
*
*
2V 100pF
5500 F01
Figure 1. 2.5GHz Receiver. Interstage Filter is Optional
5500I
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
U
U
LNA Gain (High Gain Mode) and Mixer Conversion Gain
14.0 fRF = 2.5GHz 13.9 TA = 25C 13.8 13.7 13.6 13.5 13.4 13.3 13.2 13.1 13.0 1.5 2 2.5 3 3.5 VCC (V)
5500 TA02
6.0 5.8
MIXER CONVERSION GAIN (dB)
5.6 5.4 5.2 5.0 4.8 4.6 4.4 4.2 4 4.5 5 5.5 4.0
1
LT5500
ABSOLUTE MAXIMUM RATINGS
(Note 1)
PACKAGE/ORDER I FOR ATIO
TOP VIEW EN VCC LNA_IN GND LNA_GND LNA_GND LNA_GND LNA_GND VCC 1 2 3 4 5 6 7 8 9 24 GS 23 GND 22 LNA_OUT 21 VCC 20 GND 19 LO - 18 LO + 17 VCC 16 GND 15 MIX_IN 14 GND 13 IF -
Power Supply Voltage ........................................... 5.5V LNA RF Input Power ............................................ 5dBm Mixer RF Input Power ........................................ 10dBm LO Input Power (Note 2) ................................... 10dBm All Other Pins ......................................................... 5.5V Operating Ambient Temperature Range ............................... - 40C to 85C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
ORDER PART NUMBER LT5500EGN
MIX_GND 10 GND 11 IF + 12
GN PACKAGE 24-LEAD PLASTIC SSOP TJMAX = 150C, JA = 85C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER Frequency Range (Note 3) Forward Gain Reverse Gain (Isolation) Noise Figure Input Return Loss Output Return Loss Input 1dB Compression Input 3rd Order Intercept LNA Low Gain: EN = 1.35V, GS = 0.3V Frequency Range (Note 4) Forward Gain Reverse Gain (Isolation) Noise Figure Input 1dB Compression Input 3rd Order Intercept Mixer: EN = 1.35V, GS = 1.35V RF Frequency Range (Note 4) Conversion Gain SSB Noise Figure Input P1dB Input 3rd Order Intercept LNA High Gain: EN = 1.35V, GS = 1.35V
(Test circuit shown in Figure 3 for 1.8GHz application) VCC = 3V DC, LNA: fLNA_IN = 1.8GHz, Mixer: fMIX_IN = 1.8GHz, fLO = 1.52GHz, PLO = -10dBm, TA = 25C, unless otherwise noted. (Notes 3, 4)
CONDITIONS MIN TYP 1.8 to 2.7 15.5 Terminated 50 Source No External Matching With External Matching Two Tone Test, f = 2MHz -18 18.5 -39 2.5 10.5 15 -24 -12 1.8 to 2.7 -13 -10 -34 16.5 0 Two Tone Test, f = 2MHz 4.5 9 1.8 to 2.7 5.5 Terminated 50 Source Two Tone Test, f = 2MHz -6 8.5 7.5 -13 - 2.5 MAX UNITS GHz dB dB dB dB dB dBm dBm GHz dB dB dB dBm dBm GHz dB dB dBm dBm
5500I
2
U
W
U
U
WW
W
LT5500
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER LO Frequency Range (Note 4) IF Frequency Range (Note 3) LO-IF Isolation LO-RF Isolation RF-LO Isolation
(Test circuit shown in Figure 3 for 1.8GHz application) VCC = 3V DC, LNA: fLNA_IN = 1.8GHz, Mixer: fMIX_IN = 1.8GHz, fLO = 1.52GHz, PLO = -10dBm, TA = 25C, unless otherwise noted. (Notes 3, 4)
CONDITIONS MIN TYP MAX 1.35 to 3.15 200 to 450 36 36 40 UNITS GHz MHz dB dB dB
(Test circuit shown in Figure 3 for 2.5GHz application) VCC = 3V DC, LNA: fLNA_IN = 2.5GHz, Mixer: fMIX_IN = 2.5GHz, fLO = 2.22GHz, PLO = -10dBm, TA = 25C, unless otherwise noted.
SYMBOL PARAMETER LNA High Gain: EN = 1.35V, GS = 1.35V Forward Gain Reverse Gain (Isolation) Noise Figure Input Return Loss Output Return Loss Input 1dB Compression Input 3rd Order Intercept LNA Low Gain: EN = 1.35V, GS = 0.3V Forward Gain Reverse Gain (Isolation) Noise Figure Input 1dB Compression Input 3rd Order Intercept Mixer: EN = 1.35V, GS = 1.35V Conversion Gain SSB Noise Figure Input P1dB Input 3rd Order Intercept LO-IF Isolation LO-RF Isolation RF-LO Isolation CONDITIONS MIN TYP 13.5 -35 4 12 15 -15 -3.5 -14 -39 19 -1 8 5 9.5 -11 - 2.5 33 37 32 MAX UNITS dB dB dB dB dB dBm dBm dB dB dB dBm dBm dB dB dBm dBm dB dB dB
Terminated 50 Source No External Matching With External Matching Two Tone Test, f = 2MHz
Two Tone Test, f = 2MHz
Terminated 50 Source Two Tone Test, f = 2MHz
VCC = 3V DC, TA = 25C (Note 4)
SYMBOL PARAMETER Power Supply VCC Supply Voltage ICC HG Rx High Gain Mode ICC LG Rx Low Gain Mode ICC Off Shutdown Current IEN Enable Current IGS Gain Select Current CONDITIONS MIN TYP 1.8 to 5.25 23 18 2 21 21 MAX UNITS V mA mA A A A
EN = 1.35V, GS = 1.35V EN = 1.35V, GS = 0.3V EN = 0.3V, GS = 0.3V EN = 1.35V (Note 5) GS = 1.35V (Note 6)
33 31 25
Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: LO Absolute Maximum Ratings apply for each LO pin separately. Note 3: Component values listed in Figure 3 for 1.8GHz evaluation board were used to guarantee 1.8GHz performance.
Note 4: Specifications over the -40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 5: When EN 0.3V, enable current is <10A. Note 6: When GS 0.3V, gain select current is <10A.
5500I
3
LT5500 TYPICAL PERFOR A CE CHARACTERISTICS
LNA Gain vs Supply Voltage and Temperature (High Gain Mode)
20 19 18 85C, 1.8GHz
IIP3 (dBm)
-40C, 1.8GHz 25C, 1.8GHz
NOISE FIGURE (dB)
GAIN (dB)
17 16 15 25C, 2.5GHz 14 13 12 1.5 2 -40C, 2.5GHz 85C, 2.5GHz
2.5 3 3.5 4 4.5 SUPPLY VOLTAGE (V)
LNA Gain vs Supply Voltage and Temperature (Low Gain Mode)
-10.0 -10.5 -11.0 25C, 1.8GHz -11.5 -12.0 -12.5 -13.0 -13.5 -14.0 -14.5 1.5 85C, 2.5GHz 2 2.5 3 3.5 4 4.5 SUPPLY VOLTAGE (V) 5 5.5 25C, 2.5GHz 85C, 1.8GHz -40C, 2.5GHz
IIP3 (dBm)
-40C, 1.8GHz
GAIN (dB)
25C, 1.8GHz 8
85C, 2.5GHz 25C, 2.5GHz
NOISE FIGURE (dB)
Mixer Conversion Gain vs Supply Voltage and Temperature
10 9 -40C, 1.8GHz 25C, 1.8GHz
CONVERSION GAIN (dB)
8 7 6 5
IIP3 (dBM)
-1 -2
85C, 1.8GHz 25C, 2.5GHz 25C, 1.8GHz
NOISE FIGURE (dB)
85C, 1.8GHz
25C, 2.5GHz
-40C, 2.5GHz
85C, 2.5GHz 4 1.5 2 4 4.5 2.5 3 3.5 SUPPLY VOLTAGE (V) 5 5.5
4
UW
5
5500 G01
5500 G04
LNA IIP3 vs Supply Voltage and Temperature (High Gain Mode)
0 -2 -4 -6 -8 -10 -12 -14 -16 -18 -20 85C, 1.8GHz -40C, 1.8GHz 25C, 1.8GHz 25C, 2.5GHz -40C, 2.5GHz 4.5
LNA Noise Figure vs Supply Voltage (High Gain Mode)
TA = 25C 2.5GHz
85C, 2.5GHz
4.0 3.5
3.0 1.8GHz
2.5
5.5
1.5
2
3 3.5 2.5 4 4.5 SUPPLY VOLTAGE (V)
5
5.5
2.0 1.5
2
4 4.5 2.5 3 3.5 SUPPLY VOLTAGE (V)
5
5.5
5500 G02
5500 G03
LNA IIP3 vs Supply Voltage and Temperature (Low Gain Mode)
12 85C, 1.8GHz 10
19.5 19.0 18.5 18.0 17.5 17.0 16.5
LNA Noise Figure vs Supply Voltage (Low Gain Mode)
TA = 25C 2.5GHz
6
-40C, 1.8GHz
1.8GHz
-40C, 2.5GHz 4 1.5 2 4 4.5 2.5 3 3.5 SUPPLY VOLTAGE (V) 5 5.5
16.0 1.5
2.5
3.5 4.5 SUPPLY VOLTAGE (V)
5.5
5500 G06
5500 G05
Mixer IIP3 vs Supply Voltage and Temperature
2 1 0
9.0 8.5 8.0 10.0
Mixer SSB Noise Figure vs Supply Voltage
TA = 25C 2.5GHz
85C, 2.5GHz
9.5
-3 -4 -5 -6 1.5 2 -40C, 1.8GHz
1.8GHz 7.5
-40C, 2.5GHz 2.5 3 3.5 4 4.5 SUPPLY VOLTAGE (V) 5 5.5
7.0 1.5 2 4 4.5 2.5 3 3.5 SUPPLY VOLTAGE (V) 5 5.5
5500 G07
5500 G08
5500 G09
5500I
LT5500 TYPICAL PERFOR A CE CHARACTERISTICS
Mixer Conversion Gain vs LO Power
9 8 1.8GHz
CONVERSION GAIN (dB)
6 5 4 3 2 1 0 0 IF = 280MHz VCC = 3V TA = 25C -5 -10 -15 -20 P(LO) (dBm) -25 -30 IIP3 (dBm) 2.5GHz
-1.6 -1.8 -2.0 -2.2 -2.4 -2.6 -2.8 -3.0 0 -5 -15 -20 -10 P(LO) (dBm) -25 -30 2.5GHz 1.8GHz
CONVERSION GAIN (dB)
7
LNA Input Return Loss vs Supply Voltage
15 RF = 2.5GHz 14 TA = 25C 13 12 HIGH GAIN
RL1 (dB)
11 10 9 8 7 6 1.5 2.5 3.5 VCC (V)
5500 G13
RL1 (dB)
RL2 (dB)
LOW GAIN
4.5
LNA Output Return Loss vs Temperature
20 18 16
IVCC (mA)
RF = 2.5GHz VCC = 3V HIGH GAIN
14 12 10 8 6 -50
LOW GAIN
23 21 19 17
IVCC (mA)
RL2 (dB)
50 0 TEMPERATURE (C)
UW
5500 G10
Mixer IIP3 vs LO Power
-1.0 -1.2 -1.4 IF = 280MHz VCC = 3V TA = 25C
15 14 13 12 11
Mixer SSB Noise Figure vs LO Power
IF = 280MHz VCC = 3V TA = 25C
2.5GHz 10 9 1.8GHz 8 7 0 -5 -10 -20 -15 P(LO) (dBm) -25 -30
5500 G11
5500 G12
LNA Input Return Loss vs Temperature
18 16 HIGH GAIN 14 12 10 8 LOW GAIN
5.5
LNA Output Return Loss vs Supply Voltage
RF = 2.5GHz VCC = 3V
24 RF = 2.5GHz 22 TA = 25C 20 18 16 14 12 10 8 LOW GAIN HIGH GAIN
6 -50
0 50 TEMPERATURE (C)
100
5500 G14
6 1.5
2.5
3.5 VCC (V)
4.5
5.5
5500 G15
IVCC vs Supply Voltage (High Gain Mode)
31 29 27 25 25C 85C 28 26 24 22 20
IVCC vs Supply Voltage (Low Gain Mode)
85C
25C 18 16 -40C 14
-40C 100
5500 G16
15 1.5
2.5
3.5 VCC (V)
4.5
5.5
5500 G17
12 1.5
2.5
3.5 VCC (V)
4.5
5.5
5500 G18
5500I
5
LT5500
PIN FUNCTIONS
EN (Pin 1): Enable Pin. A voltage less than 0.3V (Logic Low) disables the part. An input greater than 1.35V (Logic High) enables the part. This pin should be bypassed to ground with a 100pF capacitor. To shut down the part, this pin and GS (Pin 24) must be logic low. Voltage on this pin should not exceed VCC nor fall below ground. VCC (Pins 2, 9, 17, 21): Power Supply Pins. See Figure 6 for recommended power supply bypassing. LNA_IN (Pin 3): LNA Input Pin. The LT5500 has better than 10dB input return loss from 1.8GHz to 2.7GHz. This pin is internally biased to 0.8V and must be AC coupled. GND (Pin 4, 11, 14, 16, 20, 23): Ground Pins. These pins should be connected directly to ground. LNA_GND (Pins 5, 6, 7, 8): LNA Ground Pins. These pins control the gain of the LNA. At higher frequencies, these pins must be connected directly to ground to maximize the gain. MIX_GND (Pin 10): Mixer Ground Pin. To optimize the performance of the mixer, a 4.7nH inductor to ground is required for this pin. IF +, IF - (Pins 12, 13): Intermediate Frequency (IF) Mixer Output Pins. These pins must be inductively tied to VCC. The output can be taken differentially or transformed into a single ended output, depending on user preference and performance requirements. MIX_IN (Pin 15): Mixer RF Input. This pin is internally biased to 0.83V and must be AC coupled. An external matching network is necessary to match to a 50 system. LO +, LO - (Pins 18, 19): LO Input Pins. These pins are used to provide the LO drive to the mixer. The signal can be provided either single ended or differentially. These pins are internally biased to VCC - 0.2V and must be AC coupled. LNA_OUT (Pin 22): The Output Pin for the LNA. An external matching network is necessary to match to a 50 system. This pin must be DC coupled to the power supply. GS (Pin 24): Gain Select Pin. This pin is used to select between high gain and low gain modes. High gain mode is selected when an input voltage greater than 1.35V (Logic High) is applied to this pin. Low gain mode is selected when the applied voltage is less than 0.3V (Logic Low). This pin should be bypassed to ground with a 100pF capacitor. To shut down the part, this pin must be logic low. Voltage on this pin should not exceed VCC nor fall below ground.
6
U
U
U
5500I
LT5500
BLOCK DIAGRA W
1 EN LT5500 BIAS GS 24 3 4, 11, 14, 16, 20, 23 5 6 7 8 2, 9, 17, 21 LNA_IN GND LNA_GND LNA_OUT 22 LO - 19 LO + 18 VCC 10 MIX_GND IF + 12 LO RF IF IF - 13
5500 BD
MIX_IN 15
Figure 2. LT5500 Block Diagram
APPLICATIONS INFORMATION
The LT5500 consists of an LNA, a Mixer, an LO buffer and the associated bias circuitry. The chip is designed to be compatible with IEEE802.11b wireless local area network (WLAN), MMDS and other wireless applications. The LNA and Mixer are designed to operate over an input frequency range of 1.8GHz to 2.7GHz with a supply voltage of 1.8V to 5.25V. The Mixer IF output frequency range is 200MHz to 450MHz. The typical LO drive is -10dBm. The LO buffer operation is broadband. LNA The LNA has two modes of operation: high gain and low gain. In the high gain mode, the LNA is a cascode amplifier. Package inductance is used to achieve better than 10dB input return loss over the entire frequency range. The input of the LNA must be AC coupled. The linearity of the high gain mode of the LNA can be increased by adding inductance to LNA_GND. This will reduce the gain and improve input return loss while having little impact on the low gain mode. In low gain mode, the LNA uses a capacitively coupled diode and a resistively degenerated cascode to attenuate the incoming signal and maintain a moderate VSWR. The LNA output is an open collector, and the matching circuit requires a shunt inductor connected to the power supply to provide the bias current. The component configuration for matching and example component values are listed in Figure 3. If it is desirable to reduce the gain further and simultaneously broaden the LNA bandwidth, an additional shunt resistor to the power supply can be added to the output to reduce the output quality factor (Q). The LT5500 is designed to allow an interstage bandpass filter to be introduced between the output of the LNA and the input of the Mixer. If such an interstage filter is unnecessary, the output of the LNA can be connected to the Mixer input through a blocking capacitor and small value resistor. Mixer The Mixer consists of a single-ended input differential pair followed by a double-balanced mixer cell. The input matching configuration for the Mixer is shown in Figure 3. The Mixer uses a 4.7nH external inductance to act as a high frequency current source at the MIX_GND pin. Example component values for matching the mixer input are tabulated in Figure 3.
U
W
U
U
5500I
7
LT5500
APPLICATIONS INFORMATION
ENABLE 100pF GAIN 100pF SELECT VCC 100pF EN BIAS LT5500 GS L4 LNA_OUT C4 L2 RF OUT 100pF
RF INPUT APPLICATION DEPENDENT COMPONENT VALUES 2.5GHz RF INPUT 1.8GHz 2.7nH 4.7nH L4 4.7nH 12nH L2 1.8nH 4.7nH L3 220pF 220pF C4 10pF 10pF C17 2.7nH 5.6nH L9 1.5pF 1.8pF C23 280MHz IF OUTPUT L7 15nH T1 TC8-1 MINI-CIRCUITS GND LNA_GND LO -
IF OUTPUT L7
Figure 3. Simplified Test Schematic for 1.8GHz and 2.5GHz Applications
An IF transformer can be used to create a single-ended output. The additional discrete components necessary to achieve a 50 match are tabulated in Figure 3. Alternatively, the discrete solution shown in Figure 4 can be used to perform differential to single-ended conversion. For best LO and RF signal suppression at the IF output, a transformer should be used. If it is desirable to reduce the gain of the mixer, a resistor between the IF outputs can be used.
12 IF + LT5500 IF - 13
VCC 100pF L10 C14 50 IF OUTPUT C12
5500 F04
L11
IF OUTPUT 280MHz L10, L11 27nH C12 3.3pF C14 2.2pF
Figure 4. Alternative Mixer IF Output Matching
8
U
W
U
U
LNA_IN
VCC VCC
LO +
C17
L3 LO INPUT
*
MIX_GND L5 4.7nH T1 IF + VCC C2 100pF *REFER TO FIGURE 6 FOR POWER SUPPLY PINS BYPASSING RECOMMENDATION LO RF IF IF - MIX_IN L9 C23 MIXER RF INPUT
*
*
5500 F03
LO Buffer The LO inputs can be driven either differentially or single ended. A single-ended configuration is shown along with example component values in Figure 3. Optionally, the LO can be driven differentially as shown in Figure 5.
19 LO - LT5500 LO + 18
TX1 4:1 L3
LO INPUT
5500 F05
LO INPUT 2.22GHz L3 3.3H TX1 TOKO-BF4
Figure 5. Optional Transformer-Based Differential LO Drive
5500I
LT5500
APPLICATIONS INFORMATION
Modes of Operation The LT5500 has three operating modes: 1. Shutdown 2. LNA High Gain 3. LNA Low Gain For shutdown, the EN pin and the GS pin must be at logic Low. Logic Low is defined as a control voltage below 0.3V. LNA High gain mode requires that both EN and GS pins be at logic High. Logic High is defined as a control voltage above 1.35V. LNA Low gain mode requires that the EN pin be at logic High and that the GS pin be at logic Low. Mixer operation is independent of the GS pin. The Mixer is enabled when the EN pin is at logic High.
Table 1: Mode Selection
EN High High Low GS High Low Low LNA High Gain Low Gain Shutdown MIXER On On Shutdown
Evaluation Board Figure 6 shows the circuit schematic of the evaluation board. Each signal terminal of the evaluation board has provisions for three matching components in a T-formation. In practice, two or fewer components are needed to achieve the match. In the case of the LNA input, no external components are necessary if the band select filter provides the necessary AC coupling. Otherwise AC coupling must be provided. A similar consideration applies to the Mixer input pin. The LO terminal of the evaluation board was designed to permit evaluation of both single ended and differential matching configurations. The differential configuration anticipates the use of a transformer. Similarly, the IF output board layout was designed to permit
U
W
U
U
evaluation of both transformer based and discrete component based matching. The evaluation board employs primarily 0402 surface mount components, particularly near the signal paths. All surface mount inductors must have a high self-resonance frequency. The component values necessary for 1.8GHz and 2.5GHz applications are tabulated in Figure 3. RF Layout Tips * Use 50 impedance transmission lines up to the matching networks. Use of ground planes is a must, particularly beneath the IC. * Keep the matching networks as close to the pins as possible. * Surface mount 0402 outline (or smaller) parts are recommended to minimize parasitic capacitances and inductances. * Improve LO isolation and maximize component density by putting the LO signal trace on the bottom of the board. This permits either the matching components or an interstage filter to be placed directly between the LNA output and the Mixer input. * Place bypass capacitors to ground in close proximity to the pull-up inductors on the LNA and Mixer outputs to improve component behavior and assure a good smallsignal ground. * VCC lines must be decoupled with low impedance, broadband capacitors to prevent instability. The capacitors should be placed as close as possible to the VCC pins. * Avoid use of long traces whenever possible. Long RF traces in particular lead to signal radiation, degraded isolation and higher losses.
5500I
9
LT5500
APPLICATIONS INFORMATION
VCC2 E1 R2 5.1k VCC1 E2 C3 100pF 1 2 J2 LNA_IN R3 0 R4 0 C6 1F 3 4 5 6 7 C9 100pF 8 9 10 L5 4.7nH 11 12 EN VCC LT5500 C2 1F 4 3 R1 5.1k SW1 1 2 C24 100pF C22 100pF VCC1 C1 100pF
LNA_IN GND LNA_GND LNA_GND LNA_GND LNA_GND VCC MIX_GND GND IF +
LNA_OUT VCC GND LO- LO
+
MIX_IN GND IF -
Figure 6. 2.5GHz Evaluation Circuit Schematic
10
U
W
U
U
C25 100pF 24 23 22 21 20 19 C4 220pF 18 17 16 15 14 13 VCC1
GS GND
L4 2.7nH L2 4.7nH
C16 8.2pF J1 LNA_OUT R6 0
C5 100pF
C17 10pF
J3 LO_IN
C8 1F C10 100pF
VCC GND
L3 1.8nH
L6 2.7nH C28 1.5pF R5 0 L7 15nH
J5 MIX_IN
3 T1 4 2 C13 1nF C15 100pF 1*
*6
J6 IF_OUT E4 E5
5500 F06
5500I
LT5500
APPLICATIONS INFORMATION U W U U
Figure 7. Component Side Silkscreen of Evaluation Board
Figure 8. Component Side Layout of Evaluation Board
Figure 9. RF Ground (Layer 2) Layout of Evaluation Board
Figure 10. Routing (Layer 3) Layout of Evaluation Board
Figure 11. Bottom Side Silkscreen of Evaluation Board
Figure 12. Bottom Side Layout of Evaluation Board
5500I
11
LT5500
PACKAGE DESCRIPTION
GN Package 24-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
0.007 - 0.0098 (0.178 - 0.249) 0.016 - 0.050 (0.406 - 1.270)
0 - 8 TYP
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
RELATED PARTS
PART NUMBER LT5502 LT5503 LTC5505 DESCRIPTION 400MHz Quadrature IF Demodulator with RSSI 1.2GHz to 2.7GHz Direct IQ Modulator and Mixer ThinSOTTM RF Power Detector with Buffered Output and > 40dB Dynamic Range COMMENTS 1.8V to 5.25V Operation 1.8V to 5.25V Operation 300MHz to 3GHz, Temperature Compensated, LTC5505-1: - 28dBm to 18dBm, LTC5505-2: - 32dBm to 12dBm, VCC = 2.7V to 6V
ThinSOT is a trademark of Linear Technology Corporation.
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507
q
U
0.337 - 0.344* (8.560 - 8.738) 24 23 22 21 20 19 18 17 16 15 1413
0.033 (0.838) REF
0.229 - 0.244 (5.817 - 6.198)
0.150 - 0.157** (3.810 - 3.988)
1
23
4
56
7
8
9 10 11 12
0.015 0.004 x 45 (0.38 0.10)
0.053 - 0.068 (1.351 - 1.727)
0.004 - 0.0098 (0.102 - 0.249)
0.008 - 0.012 (0.203 - 0.305)
0.0250 (0.635) BSC
GN24 (SSOP) 1098
5500I LT/TP 1201 1.5K * PRINTED IN USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2001

▲Up To Search▲

Price & Availability of 5500I

	To Download 5500I Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .